The vast majority of all complex integrated circuits (ICs) are created by circuit designers using computers. Most circuit designers use computer programs to define the functionality required of the circuit and the computer analyzes the functionality requested in order to create the electronic equivalent of a circuit diagram.
To convert the designers intent into a physical, integrated circuit, other computer programs take libraries of cells representing groups of transistors and other low level circuit components that provide the desired functionality, determine locations for these components, and construct the wiring necessary to interconnect them. Such a tool is often called a “place and route tool.” Custom design tools also exist to provide other methods to craft complete IC layouts. Once all the electronic devices have a physical representation, it is expected that the physical circuit will deliver the specified electrical performance.
The layers of the layout data are then fabricated as a set of masks, used in the photolithographic definition and processing of the actual circuits themselves.
Before translating the IC layout data into a format for use by a photolithographic mask or reticle writing tool, the IC layout data is often analyzed by another computer program to ensure that no design rules have been broken during the creation of the IC layout data and/or to correct for errors that can occur during the photolithographic printing process.
One example of such a program is the Calibre™ program produced by Mentor Graphics Corporation of Wilsonville, Oreg., the assignee of the present application. The Calibre™ program is a suite of tools that operate on the IC layout data. These tools include a design rule checking (DRC) program that ensures the compliance with a number of design rules particular to the manufacturing process to be used. For example, a design rule can specify a particular tolerance such as “no transistors can be located within x microns of other transistors,” etc. In addition, the Calibre™ program can perform optical process correction (OPC) to compensate the layout for distortions that occur during the printing of the photolithographic mask or reticle. In addition, Calibre™ can perform phase shift mask (PSM) modifications that add phase shifters to the mask or reticle in order to enhance contrast between features or add subresolution features on an integrated circuit.
The next step in preparing an integrated circuit is to translate the verified and/or corrected IC layout data into a format that can be utilized by a mask or reticle writing tool. Examples of such formats are MEBES, for raster scanning machines manufactured by ETEC, an Applied Materials Company, “.MIC” format from Micronics AB in Sweden for their mask writers, and various vector scan formats for Toshiba, JEOL, and Hitachi. Once written, the masks or reticles are then used in a photolithographic process to expose selected areas of a silicon wafer in order to produce the integrated circuit components on the wafer. Typical mask writing tool formats are flat, and computer files written in these formats containing the corrected IC layout data can be enormous. For example, one IC layout data file for a single layer of a field programmable gate array can be approximately 58 gigabytes long. The time required to transmit a file of this size to a mask or reticle writing tool with standard network protocols can exceed 60 hours. When such large files are transmitted over communication networks, the risk that an error will occur during transmission rises with the length of the file transmitted. In addition, the time required to transmit the data file can be longer than the time required for the mask or reticle writer to produce a mask or reticle from the file. Therefore, the mask writing tool is inefficiently used when the data files are too large.
Given these problems, there is a need for an improved method of translating data into a format that can be read by a photolithographic mask or reticle writing tool that will reduce the size of the file to be transmitted and reduce the likelihood of transmission errors.